Simulators Jobs

design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.As an integral member of the ... More

design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.As an integral member of the ... More

design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.As an integral member of the ... More

design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.As an integral member of the ... More

generate analysis reports. Determine expected performance and endurance using both simulators and spreadsheet models. Compare expected and actual performance results. Analyze characterization data and create reports and recommendations. Innovate in the fields of data storage system architectures and flash storage ... More

ASIC design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.The ASIC Customer Engineer is ... More

ASIC design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.The ASIC Customer Engineer is ... More

ASIC design and implementation. Familiar with Verilog RTL coding, Verilog Simulators (NC or VCS) , Synopsys Design Compiler, Synopsys ICC Physical design tools, PrimeTime for Static Timing Analysis, Mentor FastScan, LogicVision, Verplex (or Formality), and scripting.The ASIC Customer Engineer is ... More

For Manufacturability (DFM) layout techniques Experience with transistor level circuit simulators Experience with Schematic and Layout Capture: Cadence schematic or equivalent. Experience with backend verification tools: DRC, LVS (HERCULES, CALIBRE, ICV) Experience with LEF and Milkyway view formats Understanding of ... More

generate analysis reports. Determine expected performance and endurance using both simulators and spreadsheet models. Compare expected and actual performance results. Analyze characterization data and create reports and recommendations. Innovate in the fields of data storage system architectures and flash storage ... More