on Audio and Speech Signal Processing Algorithms and Effects 2.Strong Audio algorithms optimization skills 3.Exposure to RTOS internals 4.Exposure to RISC/DSP architectures like Tensilica, ARM, TI etc 5.Strong ASM & C/C++ Programming Skills Responsibilities: Audio Codec firmware development ... More
like ProE/Catia, AutoCAD Analyze mechanical designs, Design Failure Modes and Effects analysis (FMEA) Prepare and review, documentation required to define and control products, perform GD&T/tolerance stack up analysis Create test equipment/tools & fixtures for products based on product requirements and ... More
optimal architecture that meets customer requirements Provide expertise regarding the effects of the business needs Perform functional analysis of requirements ... optimal architecture that meets customer requirements Provide expertise regarding the effects of the business needs Perform functional analysis of requirements ... More
optimal architecture that meets customer requirements Provide expertise regarding the effects of the business needs Perform functional analysis of requirements ... optimal architecture that meets customer requirements Provide expertise regarding the effects of the business needs Perform functional analysis of requirements ... More
submicron device physics in order to account for these non-ideal effects during cell design Understanding or an ability to learn a wide variety of industry standard modelling formats including:Liberty (CCS and NLM), Verilog, LEF, Milkyway, Spice, ECSM, and CDB Education ... More
CAD vendors. Job Requirements: Understanding Verilog HDL Understanding Deep Submicron effects such as 90nm and below Understanding OCV, DFM, DFY Excellent Block level and Full-chip physical design skills Self-motivated, leadership skills and experience working with global teams Minimum 5 years ... More
are desirable: Technical oUnderstanding Verilog HDL o Understanding Deep Submicron effects such as 90nm and below oUnderstanding OCV, DFM, DFY oExcellent Block level and Full-chip physical design skills oBack ground of all aspects of ASIC Physical Design: Floor planning, Clock ... More
CAD vendors. Job Requirements: Understanding Verilog HDL Understanding Deep Submicron effects such as 90nm and below Understanding OCV, DFM, DFY Excellent Block level and Full-chip physical design skills Self-motivated, leadership skills and experience working with global teams Minimum 5 years ... More
develop ProE/CATIA models and drawings. -Create Design Failure Modes and Effects analysis (FMEA). -Support design reviews, both customer and internal as required -Support failure analysis examinations and prepare Failure Analysis Reports (FAR) of findings. -Coordinate and support the prototype manufacturing ... More
compliance process in relation to SAP working and statutes and effects changes brought through notifications / circulars by statutory agencies to the internal processes.1. Graduate / DME With Post Graduate qualification pertaining to SCM / Materials / Logistics 2. Knowledge ... More
